Building an FPGA board for VGA graphics

From Benjamin Blundell:

Field programmable gate arrays, or FPGAs are wonderful little devices. In a nutshell, they are a whole load of logic blocks, wired together with interconnects. These logic blocks can be wired up however you like, to create simple, or complicated circuits. Anything from a simple XOR gate, to a CPU, to an entire system (if you have enough money to buy the biggest ones). Think of them as a big box of lego bricks that you can combine in any way you want to create any kind of digital circuit.

FPGAs have been used in many applications – emulation of older systems being one. The MiSTer is one such example. Jeri Ellsworth’s C-One is another. But really, FPGAs are found everywhere. They are quick, robust and adaptable to most situations.

My friend Will runs the Project-F website where he investigates all things FPGA. I’ve been helping out by building some boards for us, and this is one of the first. I’d like to show you all how I went about building one of our early prototypes, the triumphs and pitfalls and hopefully inspire folks to give it a go themselves.

Read more…

Building an FPGA board for VGA graphics

Hello FPGA Summer Giveaway

From our friends at Crowd Supply:

Curious about FPGAs but not sure where to start? We’ve got you covered! We’re teaming up with Crowd Supply, OSH Park, and Mouser to give away 30 Hello FPGA kits this summer and cover prototyping costs for up to five new shield designs.

Design a new Arduino shield for your Hello FPGA kit:

We will select up to five designs of a new Arduino shield for use with a Hello FPGA kit. Limit one proposal per person. Submit proposals with links to documentation via our contact form no later than Sunday, September 12, 2021 at 11:59 PM PDT. Winners will be announced on Friday, September 17, 2021. Winners will receive FREE PCB fabrication from OSH Park and parts from Mouser Electronics for prototypes of their design. Winners commit to submitting a video demonstrating a prototype of their proposed shield design in action no later than Tuesday, November 30, 2021. Selection of winners is at our discretion and will be based on the plausability of the proposed shield, completeness of the design, and the extent to which the new shield showcases the features of the Hello FPGA kit.

Read more…

Hello FPGA Summer Giveaway

Open Source Hardware (and Gateware) for 5G

From the Open Source Hardware Association:

Open Source Hardware (and Gateware) for 5G

OSHWA recently sent a response to the 5G Challenge Notice of Inquiry published by the National Telecommunications and Information Administration (NTIA) in the US. The Notice of Inquiry focuses on the development of an open-source software stack for 5G wireless communication. In our response we highlighted the role that Field-Programmable Gate Arrays (FPGAs) can play in the path from the radio receiver to the 5G software stack and conversely from the software stack to the radio transmitter. FPGAs can cope with very high data rates, for which pure software solutions can be suboptimal.

It is therefore important that FPGA designs are made part of the challenge, and also that these designs be open-source for the same reasons that it makes sense to open-source the software stack. FPGA design is typically done using Hardware Description Languages (HDLs). HDL code is fed to synthesis, place & route and bitstream generation tools. The bitstream file then configures the FPGA, so its logic gates and flip-flops implement the circuit specified in the design. HDL code is sometimes called “gateware” (a reference to the logic gates it targets) to distinguish it from software.

If researchers and developers are going to collaborate on common open-source gateware and software, they would ideally do so using an open hardware platform. This would democratize access, enlarging the talent pool which can contribute to the effort. It would also protect the development against vendor lock-in and save time and effort on porting to different imperfectly-compatible platforms.

Finally, this could be an opportunity to improve the Free and Open Source Software tools for gateware design. There are thriving communities of open-source software-defined radio and FPGA tool developers, and we believe including them in this challenge and having hardware and gateware in the picture will result in a better 5G for everyone.

Open Source Hardware (and Gateware) for 5G

AXIOM: open source cinema camera at FOSDEM

Sebastian Pichelhofer of Apertus gave an exciting talk at FOSDEM earlier this year and the video is now on YouTube:

AXIOM – open source cinema camera Project Introduction and current state of development

The presentation will give a brief overview of the projects history & lessons learned during the course of developing a high tech camera device as community project. We also want to demo and explain the produced hardware, enclosures and sample footage then look at the challenges still ahead. Last 5 minutes reserved for Q&A

Screenshot from 2020-07-26 16-04-03

AXIOM: open source cinema camera at FOSDEM

iCE Bling: Beautiful LED Earrings with Lattice iCE40 FPGA

has created wondeful LED Earrings with the Lattice iCE40UP5k FPGA and shared the project on our website:

iCEBling

Screenshot from 2020-07-19 14-10-16

Find out more about the project in this blog post:

ice-bling-sm-1-1024x683

iCE Bling FPGA – Beautiful LED Earrings with Lattice iCE40

It’s the same story every year. At the horizon is a loved one’s birthday, or an anniversary, and I want to make them something special. Buying something won’t do. Oh no, I have to design and build it myself. I would then start with a simple idea, and then complicate it progressively to the point where it would take several anniversaries to finish the project.

This time, I wanted to build a pair of earrings for my wife’s birthday. Since I am learning about FPGAs these days, I wanted to incorporate one into the design. Having gotten older and wiser, I decided to enlist help early on. I would focus on the overall design and the programming part, and leave the PCB design and assembly to my trusted friend and engineer Siva.

 

iCE Bling: Beautiful LED Earrings with Lattice iCE40 FPGA

Test fixture for the OrangeCrab

We are excited about the OrangeCrab FPGA dev board by Greg Davill as it packs the power of an ECP5 FPGA, which has an open source design flow, and 128MB DDR3 RAM into the Adafruit Feather form-factor:

Screenshot from 2020-06-08 15-38-18

We were happy to fabricate the boards for test fixture and it is great to see Greg showing it is action:

Along with the process he went through assembling it:

Test fixture for the OrangeCrab

iCE40 FPGA Board for the Raspberry Pi

Matthew Venn has created a FPGA dev board based on Lattice iCE40 8k for the Raspberry Pi.  The board uses our After Dark service which features clear solder mask on a black substrate:

board

FPGA dev board based on Lattice iCE40 8k

Aim

  • Make my first PCB with an FPGA
  • Keep it super simple and cheap
  • Configured by on-board FLASH or direct with a Raspberry Pi
  • 6 PMODs, 2 buttons, 2 LEDs, FLASH for configuration bitstreams.

What a Lattice iCE40 FPGA needs

  • A clock input. Has to be provided by an oscillator, it doesn’t have a crystal driver.
  • 1.2v core supply for the internal logic.
  • 2.5v non volatile memory supply. Can be provided via a voltage drop over a diode from 3.3v.
  • IO supply for the IO pins, different banks of IO can have different supplies. This design uses 3.3v for all banks.
  • Get configured over SPI interface. This can be done directly by a microcontroller or a computer, or the bitstream can be programmed into some FLASH, and the FPGA will read it at boot. If FLASH isn’t provided then the bitstream needs to be programmed at every power up or configuration reset.
  • Decoupling capacitors for each IO bank.

PCB

BOM

  • FPGA iCE40-HX4K-TQ144 (8k accessible with Icestorm tools)
  • 3.3v reg TLV73333PDBVT
  • 1.2v reg TLV73312PDBVT
  • 12MHz oscillator SIT2001BI-S2-33E-12.000000G
  • 16MB FLASH IS25LP016D-JBLE (optional).

Test

See the test program. This makes a nice pulsing effect on LED2, and LED1 is the slow PWM clock. The buttons increase or decrease pulsing speed.

make prog

Yosys and NextPNR are used to create the bitstream and then it’s copied to the Raspberry Pi specified by PI_ADDR in the Makefile.

Fomu-Flash is used to flash the SPI memory, or program the FPGA directly.

 

iCE40 FPGA Board for the Raspberry Pi

iCEBreaker FPGA: new video streams and new content

https://twitter.com/esden/status/1249917248795340800

An update from our Dorkbot PDX friend, Piotr Esden:

iCEBreaker FPGA: new video streams and new content

iCEBreaker Production

As you read in our last update in November, we finished fulfilling the campaign, but that does not mean work on iCEBreaker has stopped. We keep producing iCEBreakers and Pmods to keep 1BitSquared US and 1BitSquared DE, as well as Crowd Supply and Mouser, stocked.

For those of you who are patiently waiting for your shipments, don’t worry. A package with additional inventory is going out to the Mouser warehouse today!

Continuing Work on iCEBreaker

We are continuing work on new examples and additional iCEBreaker hardware. If you are not following 1BitSquared or Piotr on Twitter, you might have missed some stuff that Piotr is working on. Since January, Piotr started streaming on Twitch on a fairly regular basis. You can follow him on Twitch and be notified every time he goes live. Piotr is also announcing upcoming streams at least a day in advance on Twitter as well as on the 1BitSquared Patreon page.

As a result of the Twitch streams, we’ve had a few interesting new developments for the iCEBreaker platform. A few weeks ago, we published Litex RISC-V SOC generation examples that you can find in the iCEBreaker GitHub Organization. Piotr gave a Twitch stream presentation about the build system and how to use it. You can watch the stream Archive on Twitchdiode.zone, and YouTube. This example gives you the foundation to create your own SOC for the iCEBreaker, start adding your custom hardware to the RISC-V core, and program it in C or Rust. We are also working on MicroPython and maybe even CircuitPython support in the not too distant future.

Upcoming Twitch Stream

Piotr has scheduled a Twitch Stream for Tuesday, April 13th, 2020 at noon PDT. He will be working on a new Pmod for the iCEBreaker that will allow us to connect NES or SNES controllers from two very popular 8-bit game entertainment systems. 😉 That same Pmod will also contain a stereo audio output. This Pmod together with a DVI output, LED Panel output or VGA output will be an ideal combination to recreate old or build new custom game consoles and a wide range of emulations, for entertainment, preservation, and education.

electronics-lets-play-stream

If you are curious when the stream will happen in your timezone you can either check on Twitch itself, as there is a countdown timer till the next stream below the video streaming window, or you can check timeanddate.com.

Keep Supporting our iCEBreaker work

If you like to see continuing work and content creation for the iCEBreaker platform, and you already have all the hardware you need, then consider supporting us through Patreon. We keep adding perks for Patrons, like KiCad panel templates and behind the scenes news. We have a few very generous supporters that make the Twitch streams possible, but any additional support is appreciated.

Stay in Touch

And don’t forget, the continuing development and support for iCEBreaker keeps on rolling on the 1BitSquared Discord server, and iCEBreaker forum! So join the fun and show off your iCEBreaker projects! 🙂

Stay safe and healthy,
Piotr and Danika

iCEBreaker FPGA: new video streams and new content

Join two KiCad livestreams TODAY

Screenshot from 2020-04-01 16-17-56

At 9:00 AM US PDT today, April 1st, KiCad leader developer Seth Hillbrand will be hosting a KiCad Community meetup video conference on Jisti Meet:

Last week’s meetup was nice to see and talk with other KiCad users. Let’s do it again this week.

This week, I’m happy to answer questions and I’ll be working through designing a KiCad version of the Medtronic OpenVentilator project (http://www.medtronic.com/openventilator 5). You may have heard that Medtronic (a multi-billion $ company) bought the company that cancelled the original gov’t contract 2 for low-cost ventilators in 2015 and then this week released a “kind of” open source version 3 of their current (not low-cost) ventilator.

In reality, they released scans of the schematics and some word documents for bring-up procedures. I’m going to see if we can turn the scans into a set of useful KiCad schematics + board files. This still doesn’t get to what’s needed to actually recreate more of these ventilators but it is a needed first step.

If you are curious about recreating designs from incomplete schematics, reverse engineering in KiCad or just want to hang out and chat, please stop by.

Then at 12:00 PM US PDT, Piotr Esden will livestream KiCad board layout:

Electronics Let’s Play – iCEBreaker-bitsy update/design work Ep. 3

Screenshot from 2020-04-01 16-15-10

Join two KiCad livestreams TODAY