Teardown hardware hacking con starts today in Portland! Follow @oshpark on Twitter for updates and look for our Drew Fustini in purple. Check out the sessions page to see all the exciting people that will be presenting and running workshops!
Just the Facts
||Anyone interested in hardware: engineers, designers, artists, students, teachers…
||A three-day line up of talks, workshops, demos, installations, and puzzles
||Friday – Sunday, May 11 – 13, 2018
||Beautiful Portland, Oregon on the campus of the Pacific Northwest College of Art
||Shipping great hardware to you is rewarding, but we miss seeing you in person
||With lots of help from our friends, including our partner, Make+Think+Code @ PNCA
Teardown runs from the afternoon of Friday, May 11, 2018 through the night of Sunday, May 13, 2018. We encourage all participants to attend the entire time – plan to arrive Friday around noon and leave Monday morning. Below is the preliminary schedule.
Friday, May 11, 2018
Registration opens at 11:30 AM.
Saturday, May 12, 2018
Sunday, May 13, 2018
Ongoing Demos and Installations
BeagleWire by Michael Welling is a fully open ICE40 FPGA BeagleBone cape:
BeagleWire is a completely open source FPGA development board. Unlike most other FPGA dev boards, the BeagleWire’s hardware, software, and FPGA toolchain are completely open source. The BeagleWire is a Beaglebone compatible cape leveraging the Lattice iCE40HX FPGA.
BeagleWire can be easily expanded by adding additional external modules for example, modules for high speed data acquisition, software defined radio, and advanced control applications. Using well-known connectors like Pmod and Grove makes it possible to connect various interesting external modules widely available in stores. Owing to this, prototyping new imaginative digital designs is easier.
Software Defined Radio (SDR) project by Eric Brombaugh:
This is a test prototype for experimenting with Software Defined Radio (SDR). It is composed of several boards that are described in detail elsewhere on this site:
Combined with suitable firmware and FPGA design, these boards comprise a receiver capable of capturing 20kHz of signal from DC to over 1GHz, demodulating it with a variety of formats and driving high-quality audio.
RF input from the antenna can optionally be tuned down from VHF/UHF frequncies to an IF frequency in the HF range before passing to the ADC.
Raw HF or downconverted VHF at an IF of 5MHz is digitized to 14-bit resolution. The maximum input signal allowed without exceeing the range of the ADC puts the 0dBfs point of this system at -10dBm in 50 ohms. The ADC runs at 40MSPS with a resolution of 10 bits, providing approximately 60dB of dynamic range and 20MHz of bandwidth which places the quantization noise floor at about -70dBm.
From the ADC, data passes into the FPGA. This is an iCE5LP4k part which provides 20 4kb RAM blocks and 4 16×16 MAC blocks which are essential for the DSP required for the downconversion. In the FPGA the ADC data is pre-processed to a sample rate appropriate for the MCU. Figure 2 below shows the primary components of the FPGA design.
Raspberry Pi FPGA HAT designed by Eric Brombaugh:
The icehat is a small (Raspberry Pi Zero-sized) board with a Lattice ice40 Ultra or Ultra Plus FPGA and three Digilent-compatible 8-bit PMOD receptacles.
When we announced the Hackaday Prize with its Best Product category, [PK] polled his wife and co-workers about the idea of making a desktop monitor using 6″ 800×600 ePaper, which he has since built and calls the PaperBack. One such requirement for a monitor is to be able to connect to it using one of…
via Hackaday Prize Entry: PaperBack Desktop ePaper Monitor — Hackaday
From Julien on Hackaday.io:
ice40 FPGA based custom board to control eink display
The design files and source code are available on GitHub:
julbouln has shared the board on OSH Park:
Here is a video of the project in action:
Test with a homemade WIP epub reader, using ifusb interface ~ 1 fps
From Sebastian of the Apertus Open Source Cinema Camera project:
Developer Kits have been shipping for some time now and we are aware that the most pressing question for many of you is “When will the AXIOM Beta evolve from a Developer Kit to being a production ready camera?” This article should help to answer that question, but keep in mind that the camera has been carefully designed to evolve constantly.