- Make my first PCB with an FPGA
- Keep it super simple and cheap
- Configured by on-board FLASH or direct with a Raspberry Pi
- 6 PMODs, 2 buttons, 2 LEDs, FLASH for configuration bitstreams.
What a Lattice iCE40 FPGA needs
- A clock input. Has to be provided by an oscillator, it doesn’t have a crystal driver.
- 1.2v core supply for the internal logic.
- 2.5v non volatile memory supply. Can be provided via a voltage drop over a diode from 3.3v.
- IO supply for the IO pins, different banks of IO can have different supplies. This design uses 3.3v for all banks.
- Get configured over SPI interface. This can be done directly by a microcontroller or a computer, or the bitstream can be programmed into some FLASH, and the FPGA will read it at boot. If FLASH isn’t provided then the bitstream needs to be programmed at every power up or configuration reset.
- Decoupling capacitors for each IO bank.
- FPGA iCE40-HX4K-TQ144 (8k accessible with Icestorm tools)
- 3.3v reg TLV73333PDBVT
- 1.2v reg TLV73312PDBVT
- 12MHz oscillator SIT2001BI-S2-33E-12.000000G
- 16MB FLASH IS25LP016D-JBLE (optional).
See the test program. This makes a nice pulsing effect on LED2, and LED1 is the slow PWM clock. The buttons increase or decrease pulsing speed.
Yosys and NextPNR are used to create the bitstream and then it’s copied to the Raspberry Pi specified by PI_ADDR in the Makefile.
Fomu-Flash is used to flash the SPI memory, or program the FPGA directly.
As you read in our last update in November, we finished fulfilling the campaign, but that does not mean work on iCEBreaker has stopped. We keep producing iCEBreakers and Pmods to keep 1BitSquared US and 1BitSquared DE, as well as Crowd Supply and Mouser, stocked.
For those of you who are patiently waiting for your shipments, don’t worry. A package with additional inventory is going out to the Mouser warehouse today!
Continuing Work on iCEBreaker
We are continuing work on new examples and additional iCEBreaker hardware. If you are not following 1BitSquared or Piotr on Twitter, you might have missed some stuff that Piotr is working on. Since January, Piotr started streaming on Twitch on a fairly regular basis. You can follow him on Twitch and be notified every time he goes live. Piotr is also announcing upcoming streams at least a day in advance on Twitter as well as on the 1BitSquared Patreon page.
As a result of the Twitch streams, we’ve had a few interesting new developments for the iCEBreaker platform. A few weeks ago, we published Litex RISC-V SOC generation examples that you can find in the iCEBreaker GitHub Organization. Piotr gave a Twitch stream presentation about the build system and how to use it. You can watch the stream Archive on Twitch, diode.zone, and YouTube. This example gives you the foundation to create your own SOC for the iCEBreaker, start adding your custom hardware to the RISC-V core, and program it in C or Rust. We are also working on MicroPython and maybe even CircuitPython support in the not too distant future.
Upcoming Twitch Stream
Piotr has scheduled a Twitch Stream for Tuesday, April 13th, 2020 at noon PDT. He will be working on a new Pmod for the iCEBreaker that will allow us to connect NES or SNES controllers from two very popular 8-bit game entertainment systems. 😉 That same Pmod will also contain a stereo audio output. This Pmod together with a DVI output, LED Panel output or VGA output will be an ideal combination to recreate old or build new custom game consoles and a wide range of emulations, for entertainment, preservation, and education.
If you are curious when the stream will happen in your timezone you can either check on Twitch itself, as there is a countdown timer till the next stream below the video streaming window, or you can check timeanddate.com.
Keep Supporting our iCEBreaker work
If you like to see continuing work and content creation for the iCEBreaker platform, and you already have all the hardware you need, then consider supporting us through Patreon. We keep adding perks for Patrons, like KiCad panel templates and behind the scenes news. We have a few very generous supporters that make the Twitch streams possible, but any additional support is appreciated.
Stay in Touch
And don’t forget, the continuing development and support for iCEBreaker keeps on rolling on the 1BitSquared Discord server, and iCEBreaker forum! So join the fun and show off your iCEBreaker projects! 🙂
Stay safe and healthy,
Piotr and Danika
From Brian Benchoff on the Hackaday blog:
The Hackaday Superconference is over, which is a shame, but one of the great things about our conference is the people who manage to trek out to Pasadena every year to show us all the cool stuff they’re working on. One of those people was [Piotr Esden-Tempski], founder of 1 Bit Squared, and he brought some goodies that would soon be launched on a few crowdfunding platforms. The coolest of these was the iCEBreaker, an FPGA development kit that makes it easy to learn FPGAs with an Open Source toolchain.
The hardware for the iCEBreaker includes the iCE40UP5K fpga with 5280 logic cells,, 120 kbit of dual-port RAM, 1 Mbit of single-port RAM, and a PLL, two SPIs and two I2Cs. Because the most interesting FPGA applications include sending bits out over pins really, really fast, there’s also 16 Megabytes of SPI Flash that allows you to stream video to a LED matrix. There are enough logic cells here to synthesize a CPU, too, and already the iCEBreaker can handle the PicoRV32, and some of the RISC-V cores. Extensibility is through PMOD connectors, and yes, there’s also an HDMI output for your vintage computing projects.
BeagleWire byis a fully open ICE40 FPGA BeagleBone cape:
BeagleWire is a completely open source FPGA development board. Unlike most other FPGA dev boards, the BeagleWire’s hardware, software, and FPGA toolchain are completely open source. The BeagleWire is a Beaglebone compatible cape leveraging the Lattice iCE40HX FPGA.
BeagleWire can be easily expanded by adding additional external modules for example, modules for high speed data acquisition, software defined radio, and advanced control applications. Using well-known connectors like Pmod and Grove makes it possible to connect various interesting external modules widely available in stores. Owing to this, prototyping new imaginative digital designs is easier.
From Julien on Hackaday.io:
ice40 FPGA based custom board to control eink display
The design files and source code are available on GitHub:
julbouln has shared the board on OSH Park:
Here is a video of the project in action:
Test with a homemade WIP epub reader, using ifusb interface ~ 1 fps
From the BeagleBoard.org Foundation blog:
Checkout hackaday.io more information on the cape:
The BeagleWire is an FPGA(Lattice iCE40HX4k) development platform that has been designed for use with BeagleBone boards.
mwelling has shared the board on OSH Park:
Elliot Williams writes on Hackaday:
E-ink displays are awesome. Humans spent centuries reading non-backlit devices, and frankly it’s a lot easier on the eyes. But have you looked into driving one of these critters yourself? It’s a nightmare. So chapeau! to [Julien] for his FPGA-based implementation that not only uses our favorite open-source FPGA toolchain, and serves as an open reference implementation for anyone else who’s interested.
Watch the E-Ink controller in action:
Design files and source code are available on GitHub:
julbouln has shared the board on OSH Park:
Black Mesa Labs created this board that adds a Lattice FPGA to a Raspberry Pi:
BML has been very much enchanted with the Lattice FPGA boards for Raspberry Pi, IcoBoard , BlackIce and IceHat. The IceZero board is a BML creation that attempts to combine the best features of all 3 boards into a single design.
IceZero features common with other designs
- Fully Open-Source Hardware and Software Design.
- Lattice ICE40HX4K FPGA that supports Clifford Wolf’s Project IceStorm tool chain.
- Interfaces to Raspberry Pi 2×20 GPIO Header for both power and bus interfaces.
- PROM programmable directly from Rasp Pi, no JTAG programmer required.
- External SRAM, supporting soft CPU core designs ( code execution ).
- Extra large SPI PROM, supporting soft CPU core designs ( code storage ).
- Industry standard PMOD expansion headers
IceZero features that are BML specific
- Mesa Bus Protocol 32 MHz SPI link between CPU and FPGA.
- 2-Layer PCB design. Orderable via OSH-Park or Gerbers for Downloading.
- FTDI 1×6 USB Serial Cable header for use with PC instead of Pi ( or as a soft CPU debug Trace Port ).
- Single Pi UART plumbed to FPGA for muxing to multiple external serial devices.
BlackMesaLabs has shared the board on OSH Park:
BML IceZero Lattice ICE40 FPGA for RaspPi