From Brian Benchoff on the Hackaday blog:
The Hackaday Superconference is over, which is a shame, but one of the great things about our conference is the people who manage to trek out to Pasadena every year to show us all the cool stuff they’re working on. One of those people was [Piotr Esden-Tempski], founder of 1 Bit Squared, and he brought some goodies that would soon be launched on a few crowdfunding platforms. The coolest of these was the iCEBreaker, an FPGA development kit that makes it easy to learn FPGAs with an Open Source toolchain.
The hardware for the iCEBreaker includes the iCE40UP5K fpga with 5280 logic cells,, 120 kbit of dual-port RAM, 1 Mbit of single-port RAM, and a PLL, two SPIs and two I2Cs. Because the most interesting FPGA applications include sending bits out over pins really, really fast, there’s also 16 Megabytes of SPI Flash that allows you to stream video to a LED matrix. There are enough logic cells here to synthesize a CPU, too, and already the iCEBreaker can handle the PicoRV32, and some of the RISC-V cores. Extensibility is through PMOD connectors, and yes, there’s also an HDMI output for your vintage computing projects.
BeagleWire by Michael Welling is a fully open ICE40 FPGA BeagleBone cape:
BeagleWire is a completely open source FPGA development board. Unlike most other FPGA dev boards, the BeagleWire’s hardware, software, and FPGA toolchain are completely open source. The BeagleWire is a Beaglebone compatible cape leveraging the Lattice iCE40HX FPGA.
BeagleWire can be easily expanded by adding additional external modules for example, modules for high speed data acquisition, software defined radio, and advanced control applications. Using well-known connectors like Pmod and Grove makes it possible to connect various interesting external modules widely available in stores. Owing to this, prototyping new imaginative digital designs is easier.
From Julien on Hackaday.io:
ice40 FPGA based custom board to control eink display
The design files and source code are available on GitHub:
julbouln has shared the board on OSH Park:
Here is a video of the project in action:
Test with a homemade WIP epub reader, using ifusb interface ~ 1 fps
From the BeagleBoard.org Foundation blog:
Watch the introduction videos from our Google Summer of Code 2017 students including BeagleWire software support by Patryk Mężydło
Checkout hackaday.io more information on the cape:
The BeagleWire is an FPGA(Lattice iCE40HX4k) development platform that has been designed for use with BeagleBone boards.
mwelling has shared the board on OSH Park:
Elliot Williams writes on Hackaday:
E-ink displays are awesome. Humans spent centuries reading non-backlit devices, and frankly it’s a lot easier on the eyes. But have you looked into driving one of these critters yourself? It’s a nightmare. So chapeau! to [Julien] for his FPGA-based implementation that not only uses our favorite open-source FPGA toolchain, and serves as an open reference implementation for anyone else who’s interested.
Watch the E-Ink controller in action:
Design files and source code are available on GitHub:
julbouln has shared the board on OSH Park:
Black Mesa Labs created this board that adds a Lattice FPGA to a Raspberry Pi:
BML has been very much enchanted with the Lattice FPGA boards for Raspberry Pi, IcoBoard , BlackIce and IceHat. The IceZero board is a BML creation that attempts to combine the best features of all 3 boards into a single design.
IceZero features common with other designs
- Fully Open-Source Hardware and Software Design.
- Lattice ICE40HX4K FPGA that supports Clifford Wolf’s Project IceStorm tool chain.
- Interfaces to Raspberry Pi 2×20 GPIO Header for both power and bus interfaces.
- PROM programmable directly from Rasp Pi, no JTAG programmer required.
- External SRAM, supporting soft CPU core designs ( code execution ).
- Extra large SPI PROM, supporting soft CPU core designs ( code storage ).
- Industry standard PMOD expansion headers
IceZero features that are BML specific
- Mesa Bus Protocol 32 MHz SPI link between CPU and FPGA.
- 2-Layer PCB design. Orderable via OSH-Park or Gerbers for Downloading.
- FTDI 1×6 USB Serial Cable header for use with PC instead of Pi ( or as a soft CPU debug Trace Port ).
- Single Pi UART plumbed to FPGA for muxing to multiple external serial devices.
BlackMesaLabs has shared the board on OSH Park:
BML IceZero Lattice ICE40 FPGA for RaspPi