From Nisha Kumar:
An overview of the DC503 party badge as seen at DefCon 2018
Hi! My name is Nisha, and I made a party bangle for my friend, Miki, to take with her to DefCon25. It was my first fully-formed electronics project and it posed some interesting challenges due to its unusual form factor. You can read about my experiences with that project here.
Soon after DefCon25, I was approached by r00tkillah to make over a 100 of something similar for the DC503 party at DefCon26. The plan was to combine the power of the BMD-300 SoC by Rigado used in the Wagon Badge from the previous year with my Neopixel bangle form factor. We would call it “The Banglet” and it was going to be awesome.
In passive mode, the banglet’s LEDs light up when detecting nearby Bluetooth devices. The number of LEDs that are lit correspond to the number of BT devices detected and their colors are based on each device’s mac address.
Software Defined Radio (SDR) project by Eric Brombaugh:
This is a test prototype for experimenting with Software Defined Radio (SDR). It is composed of several boards that are described in detail elsewhere on this site:
Combined with suitable firmware and FPGA design, these boards comprise a receiver capable of capturing 20kHz of signal from DC to over 1GHz, demodulating it with a variety of formats and driving high-quality audio.
RF input from the antenna can optionally be tuned down from VHF/UHF frequncies to an IF frequency in the HF range before passing to the ADC.
Raw HF or downconverted VHF at an IF of 5MHz is digitized to 14-bit resolution. The maximum input signal allowed without exceeing the range of the ADC puts the 0dBfs point of this system at -10dBm in 50 ohms. The ADC runs at 40MSPS with a resolution of 10 bits, providing approximately 60dB of dynamic range and 20MHz of bandwidth which places the quantization noise floor at about -70dBm.
From the ADC, data passes into the FPGA. This is an iCE5LP4k part which provides 20 4kb RAM blocks and 4 16×16 MAC blocks which are essential for the DSP required for the downconversion. In the FPGA the ADC data is pre-processed to a sample rate appropriate for the MCU. Figure 2 below shows the primary components of the FPGA design.
It used to be something of an electronic rite of passage, the construction of an FM bug. Many of us will have taken a single RF transistor and a tiny coil of stiff wire, and with the help of a few passive components made an oscillator somewhere in the FM broadcast band.
via An Especially Tiny And Perfectly Formed FM Bug — Hackaday
Valerio Backslashnew has designed a small dock for the Onion Omega 2 and 2+:
I needed the smallest dock i could do, that featured:
- Type A USB host
- Micro USB for power
Here’s what i came up with, i called it dock\new.
It has an onboard linear voltage regulation (i didn’t bother going with a switching one for such low power), magnetics integrated in the RJ45 connector to save space, USB host ESD protection (diode array), USB host PTC fuse.
On the left side there is the RJ45 connector and nothing on the back side of the board, so that you can easily access the MicroSD card on the Omega 2+.
On the right side (the antenna side of the omega) you have the USB type A connector, facing outwards, and the microusb connector for power, facing inwards.
The project is open source (CC-BY-SA 4.0), and the KiCad schematics, board layout and the other files are available on GitHub:
5N44P has shared the board on OSH Park:
Alex Glow of Hackster.io takes a look at the OSHWi octopus badge designed by Gustavo Reynaga:
The design files and source code are available on GitHub:
GReynaga has shared the board on OSH Park:
Oshwi Badge HACKSTER Version Rev 1
SoftRF is an open project for aircraft collision avoidance avionics and has designed an adapter for RFM9x to fit NRF905 module dimensions and pinout:
SoftRF has shared the board on OSH Park: