Kris Winer of Pesky Products is creating modular add-on boards for the Teensy 3.x:
The intent is to gain 10-DoF motion sensing capability using open-source Madgwick/Mahony sensor fusion in a very small package
One of these 9-axis motion sensors:
- Invensense’s MPU9250
- ST Microelectronics’ LSM9DS0
- Bosch’s BMX-055
is coupled with one of these altimeters/pressure sensors:
- Freescale’s MPL3115A2
- Measurement Specialties’ MS5637
Kris writes that the modular approach allows other capabilities such as Bluetooth Smart, LiPo battery charging, and motor control boards to be added to the same Teensy to provide flexible configurations tailored to specific applications.
is designing of inexpensive boards to teach basic digital electronics like logic gates, flip-flops and registers:
Alexander created a Four 4 NAND Gate board with a 7400 chip in SOIC package mounted on the bottom:
He is now trying a different approach that eliminates the need for a breadboard:
Follow the project on Hackaday.io for further updates!
Pesky Products created this nifty breakout board:
These HP QDSP-6064 bubble displays have a cool retro look right out of the seventies. More practically, they allow compact numerical displays and, coupled with the HT16K33 LED driver chip, 16 digits can be displayed with only two I2C wires, power and ground. That’s a lot of display without taking up a lot of GPIO pins.
The design offers several advantages:
- no external current-limiting resistors with the HT16K33 chip
- power the display board with 3.3V or 5V
- only 4 wires to control up to 8 x 4 four-digit displays
- 8 boards can be independently addressed via solder jumpers
- small footprint at 1.46″ x 1.51″b
Arduino code to display integer and floating point numbers on the bubble display:
John Boyd wanted learn more about ADCs, so he designed this 4-bit pipelined residue amplifier ADC using discrete components:
The residue amplifier pipeline ADC consists of one key block: the residue amplifier. These residue amplifier blocks are then connected in series, forming a pipeline, hence the name.
To design this kind of ADC, I just used some opamp logic to make a residue amplifier and then cascaded four of them together to make a 4 bit ADC.
The design files are available on Github:
Charles Lakins created this shield for Teensy 3.x which can control addressable RGB LEDs (WS28xx):
The shield also enables data logging of Smart Port Sensors: FrSky S-Port telemetry library.
Video of the shield controlling RGB LEDs:
3D-printed Neopixel Triplet holds WS2812B modules connected with 6-pin silicone wire:
irun4fundotca has shared the board on OSH Park:
Teensy v3.1 – S.Port & WS28xx Led Shield
Excited about the new board design?
Great! So are we!
Part of any great design is making sure that what you’ll get matches what you designed.
- The design rules, stackup, and specifications depend on your chosen fabrication service. You’ll want to enter the important information into your design tool’s DRC checker so it can verify things for you.
- Run your DRC tool. We don’t perform any design rule checking on our end, since your design tool will help you fix errors more efficiently than we can.
- EAGLE users can load our design rules files, which contains all the DRC information.
- Preparing the board outline: We use a separate board outline file that tells us where your board edge should be. We use that for both calculating the board size and cost, and send it to the fab for a milling guide. Most design tools have a special layer for this. You can also use Gerbv to get one from a different layer.
- If you have any internal cutouts or slots, you’ll want to verify that your design tool generates them how we expect.
- Preparing a bitmap or logo: As much as we love board art, some ways of generating it can be problematic. We can handle silkscreen logos up to 500 DPI but the process can be a little complicated. With a few adjustments though, you can ensure your design comes through as expected.
- Check connections against your schematic.
- Check footprints against the datasheet.
- Make up your bill of materials and verify all your parts are in stock. Nothing is worse than ordering a board, only to realize a critical component isn’t for sale.
- Add a time stamp, version number, the board name, and any other extra text you want.
- In Eagle, run
ratsnest one more time to make sure any airwires and ground planes are cleaned up.
- In other design tools, you may need to rebuild ground planes, fill zones, or other final steps to ensure your copper pours connect properly.
- Run the Design Rules Check (DRC) to verify your design against our fabrication specs.
- Do a last-minute once over on your design, and look for odd spots. Are all the traces routed? Will a via or pad mess up your silk? Is everything you care about inside the board outline? Are there any dead-end traces? If so, correct them and re-run the DRC.
- It’s often a good idea to take a look at our Design Tool Help section. We try our best to keep track of surprises that might affect fabrication, to save you some trouble.
- Run the DRC checker one more time. You can’t use this tool too often!
- EAGLE users can usually upload the .BRD file directly to oshpark.com, and let us make the gerbers. In some cases though, you may want to generate your own gerbers.
- Generate the gerbers: Our Design Tool Help has tips for generating gerbers from design tools. Our automatic upload process expects the following layers for a typical PCB:
- Board Outline
- Top Copper
- Bottom Copper
- Top Mask
- Bottom Mask
- Top Silk (Optional)
- Bottom Silk (Optional)
- Internal Layer 1 (4 Layer only)
- Internal Layer 2 (4 Layer only)
- Preparing the drills file: There’s a lot of odd drill formats, so this tends to be the most problematic file. Our Design Tool Help section will have specific tips for your tool, but generally the format we need is
- NC Drill Format (sometimes labeled Excellon)
- 2:4 precision
- Absolute Coordinate Origin
- No Zero Suppression or Leading Zero Suppression
- Verify the gerbers using a compatible gerber viewer program, such as gerbv.
- If you have a 4 layer board, convert all the internal layers to positive layers.
- Remove Alignment points: Ultiboard tends to add alignment points on the files, which confuses our site’s pricing system. Removing those is suggested.
- Supported Naming Pattern: Our site can detect the default gerber layer naming schemes from several PCB design tools, but this is a naming scheme that is known to work. This is especially important for 4 layer designs to ensure that the internal planes are where you expect them.
- Finally, upload the gerbers in a .zip file to oshpark.com.
If you get through all these steps and are still having trouble, or just have questions, feel free to contact email@example.com.
Having trouble uploading?
Curious about what we want from your design files?
Here are some help pages for using common CAD packages with OSH Park:
Running into something unusual?
Can’t figure it out?
We can help! Send your files to firstname.lastname@example.org, and we’ll get everything in order.
You might also take a look at our more general errors relating to submitting orders.