45 Chips in 30 Days: Open Source ASIC at its best!

March 7, 2021March 7, 2021 fustiniasic, FOSSi, siliconLeave a comment

45 Chips in 30 Days: Open Source ASIC at its best!

Only seven months ago, open source chips were a dream of some, and clearly impossible to others. Today we know better. In a joint effort between efabless, Google, and the SkyWater foundry, everybody got a chance to send an open source chip to fabrication. And many did!
One of the key people who made all of that happen is Mohamed Kassem, co-founder and CEO of efabless. He joined us at FOSSi Dial-Up to discuss how the “Open MPW” program went so far. (A recording of the talk is available on YouTube.)
Efabless wants to enable everyone to produce chips. As previous talks in the FOSSi Dial-Up series have shown, getting to this point requires solving a huge amount of technical, legal, and financial challenges. Taken together they made it unthinkable for hobbyists, many in academia, and even for small companies to produce their own chips. Thankfully these initial hurdles are of the past. Once the innovative power of the open source community was unleashed, many of the projects associated with the Open MPW shuttle saw an exponential rise in interest.
With interest exploding there was a lot to learn for everybody involved. Efabless, Google, and SkyWater prepared for that even before the Open MPW program was announced by producing three test chips, which were intended to validate the tooling and especially the SRAM components of the chip. An experience that paid off when they put together the Caravel Harness SoC, a “frame” with a 10mm² space in the middle for the actual chip design.

Read more…

FOSSi Dial-up: RISC-V SoC Family on SkyWater 130nm

September 3, 2020 fustiniFOSSi, risc-v, siliconLeave a comment

Mohamed Kassem of eFabless presented in the latest FOSSi Dial-Up live stream: The striVe RISC-V SoC Family on SkyWater 130nm

For the first time in the history of the semiconductor industry it is possible to design, verify, manufacture Systems-on-Chip (SoC)’s that have been completely developed using an open source process technology, open source IP and open source design automation environment.
In a collaborative effort with Google and SkyWater, efabless’ team has designed and implemented the striVe SoC family using SkyWater’s SKY130 130nm process, efabless’ OpenLANE RTL2GDS no-human-in-the-loop SoC compiler and several key FOSS components including standard cell and IO libraries from SkyWater and OSU, Dual port SRAM created using OpenRAM, PicoRV32 RISC-V CPU and future versions that will include open source eFPGA blocks – all of them are available under the Apache 2.0 license.

Mohamed will present the striVe open source SoC family with its 6 configurations which will be publicly released to the design community as concrete designs currently on their way to manufacturing. Being truly FOSS and foundry-enabled, the striVe SoC family will serve as physical demonstrators and be the seed for countless community-defined and designed SoC’s stretching the limits of innovation and to serve select commercial markets.SHOW LESS

“Produce your own physical chips. For free. In the Open.”

July 1, 2020 fustiniasic, chip design, FOSSi, risc-v, siliconLeave a comment

Big news today from Tim Ansell of Google along with eFabless and Skywater Foundry. FOSSi Foundation has a new post with the details:

Produce your own physical chips. For free. In the Open.

Today, in a FOSSi Dial-Up talk, Tim Ansell of Google announced SkyWater PDK, the first manufacturable, open source process design kit. What differentiates this PDK from previous attempts is the fact that it is manufacturable: with this PDK, you can actually produce chips with the SkyWater foundry in the 130nm node.

That leaves you as chip designer only with one road block: money. Manufacturing chips is expensive – even for more than a decade old nodes like the 130nm node, you need to spend at least a couple thousand dollars.

You know what? Don’t worry – Google and efabless have got you covered! They are providing completely free of cost chip manufacturing runs: one in November this year, and multiple more in 2021. All open source chip designs qualify, no further strings attached!

Screenshot from 2020-07-01 01-58-27

Creating A Custom ASIC With The First Open Source PDK

June 26, 2020 fustiniFOSSi, Google, hackaday, siliconLeave a comment

A process design kit (PDK) is a by now fairly standard part of any transformation of a new chip design into silicon. A PDK describes how a design maps to a foundry’s tools, which itself are described by a DRM, or design rule manual. The FOSSi foundation now reports on a new, open PDK project launched by Google and SkyWater Technology. Although the OpenPDK project has been around for a while, it is a closed and highly proprietary system, aimed at manufacturers and foundries.

The SkyWater Open Source PDK on Github is listed as a collaboration between Google and SkyWater Technology Foundry to provide a fully open source PDK and related sources. This so that one can create manufacturable designs at the SkyWater foundry, that target the 130 nm node. Open tools here should mean a far lower cost of entry than is usually the case.

via Creating A Custom ASIC With The First Open Source PDK — Hackaday

OSH Park sponsors the FOSSi Foundation

June 15, 2017June 15, 2017 fustiniFOSSi, FPGA, open silicon, ORCONF, risc-vLeave a comment

The Free and Open Source Silicon (FOSSi) Foundation fosters open source semiconductor design and we’re proud to have become a sponsor! Julius Baxter writes on the FOSSi Foundation blog:

OSH Park sponsors the FOSSi Foundation

We are pleased to announce that OSH Park, the purveyors of perfect purple PCBs, have become sponsors of the FOSSi Foundation’s activities. We are very grateful for their support and would like to recognize this by listing them on our Sponsors page at the Bronze tier.

We are actively looking for sponsors for the Foundation, if you’re interested in learning more about our activities and why we are looking for sponsorship, then please visit our sponsorship page and for more, see our detailed sponsorship proposal document.

More information on the FOSSi Foundation:

Inspired by the success of open source software, the Foundation will help bring about IP and tools of comparable quality to proprietary offerings, and which are developed according to an open source model by a highly collaborative and inclusive community. The FOSSi Foundation will address the issues the field currently faces; fragmentation, legal uncertainty, design quality, and high barriers to entry.

FOSSi has launched LibreCores:

gateway to free and open source digital designs and other components that you can use and re-use in your digital designs.

FOSSi also organizes the ORConf:

We’re pleased to announce that ORConf 2017 will be held between September 8th and September 10th in Hebden Bridge in the UK.

Past talks are on the FOSSi Foundation’s YouTube channel such as this introduction from last year (jump to 1:59):