Sebastian Pichelhofer of Apertus gave an exciting talk at FOSDEM earlier this year and the video is now on YouTube:
The presentation will give a brief overview of the projects history & lessons learned during the course of developing a high tech camera device as community project. We also want to demo and explain the produced hardware, enclosures and sample footage then look at the challenges still ahead. Last 5 minutes reserved for Q&A
Mahesh Venkitachalam has created wondeful LED Earrings with the Lattice iCE40UP5k FPGA and shared the project on our website:
Find out more about the project in this blog post:
It’s the same story every year. At the horizon is a loved one’s birthday, or an anniversary, and I want to make them something special. Buying something won’t do. Oh no, I have to design and build it myself. I would then start with a simple idea, and then complicate it progressively to the point where it would take several anniversaries to finish the project.
This time, I wanted to build a pair of earrings for my wife’s birthday. Since I am learning about FPGAs these days, I wanted to incorporate one into the design. Having gotten older and wiser, I decided to enlist help early on. I would focus on the overall design and the programming part, and leave the PCB design and assembly to my trusted friend and engineer Siva.
We are excited about the OrangeCrab FPGA dev board by Greg Davill as it packs the power of an ECP5 FPGA, which has an open source design flow, and 128MB DDR3 RAM into the Adafruit Feather form-factor:
We were happy to fabricate the boards for test fixture and it is great to see Greg showing it is action:
Along with the process he went through assembling it:
- Make my first PCB with an FPGA
- Keep it super simple and cheap
- Configured by on-board FLASH or direct with a Raspberry Pi
- 6 PMODs, 2 buttons, 2 LEDs, FLASH for configuration bitstreams.
What a Lattice iCE40 FPGA needs
- A clock input. Has to be provided by an oscillator, it doesn’t have a crystal driver.
- 1.2v core supply for the internal logic.
- 2.5v non volatile memory supply. Can be provided via a voltage drop over a diode from 3.3v.
- IO supply for the IO pins, different banks of IO can have different supplies. This design uses 3.3v for all banks.
- Get configured over SPI interface. This can be done directly by a microcontroller or a computer, or the bitstream can be programmed into some FLASH, and the FPGA will read it at boot. If FLASH isn’t provided then the bitstream needs to be programmed at every power up or configuration reset.
- Decoupling capacitors for each IO bank.
- FPGA iCE40-HX4K-TQ144 (8k accessible with Icestorm tools)
- 3.3v reg TLV73333PDBVT
- 1.2v reg TLV73312PDBVT
- 12MHz oscillator SIT2001BI-S2-33E-12.000000G
- 16MB FLASH IS25LP016D-JBLE (optional).
See the test program. This makes a nice pulsing effect on LED2, and LED1 is the slow PWM clock. The buttons increase or decrease pulsing speed.
Yosys and NextPNR are used to create the bitstream and then it’s copied to the Raspberry Pi specified by PI_ADDR in the Makefile.
Fomu-Flash is used to flash the SPI memory, or program the FPGA directly.
As you read in our last update in November, we finished fulfilling the campaign, but that does not mean work on iCEBreaker has stopped. We keep producing iCEBreakers and Pmods to keep 1BitSquared US and 1BitSquared DE, as well as Crowd Supply and Mouser, stocked.
For those of you who are patiently waiting for your shipments, don’t worry. A package with additional inventory is going out to the Mouser warehouse today!
Continuing Work on iCEBreaker
We are continuing work on new examples and additional iCEBreaker hardware. If you are not following 1BitSquared or Piotr on Twitter, you might have missed some stuff that Piotr is working on. Since January, Piotr started streaming on Twitch on a fairly regular basis. You can follow him on Twitch and be notified every time he goes live. Piotr is also announcing upcoming streams at least a day in advance on Twitter as well as on the 1BitSquared Patreon page.
As a result of the Twitch streams, we’ve had a few interesting new developments for the iCEBreaker platform. A few weeks ago, we published Litex RISC-V SOC generation examples that you can find in the iCEBreaker GitHub Organization. Piotr gave a Twitch stream presentation about the build system and how to use it. You can watch the stream Archive on Twitch, diode.zone, and YouTube. This example gives you the foundation to create your own SOC for the iCEBreaker, start adding your custom hardware to the RISC-V core, and program it in C or Rust. We are also working on MicroPython and maybe even CircuitPython support in the not too distant future.
Upcoming Twitch Stream
Piotr has scheduled a Twitch Stream for Tuesday, April 13th, 2020 at noon PDT. He will be working on a new Pmod for the iCEBreaker that will allow us to connect NES or SNES controllers from two very popular 8-bit game entertainment systems. 😉 That same Pmod will also contain a stereo audio output. This Pmod together with a DVI output, LED Panel output or VGA output will be an ideal combination to recreate old or build new custom game consoles and a wide range of emulations, for entertainment, preservation, and education.
If you are curious when the stream will happen in your timezone you can either check on Twitch itself, as there is a countdown timer till the next stream below the video streaming window, or you can check timeanddate.com.
Keep Supporting our iCEBreaker work
If you like to see continuing work and content creation for the iCEBreaker platform, and you already have all the hardware you need, then consider supporting us through Patreon. We keep adding perks for Patrons, like KiCad panel templates and behind the scenes news. We have a few very generous supporters that make the Twitch streams possible, but any additional support is appreciated.
Stay in Touch
And don’t forget, the continuing development and support for iCEBreaker keeps on rolling on the 1BitSquared Discord server, and iCEBreaker forum! So join the fun and show off your iCEBreaker projects! 🙂
Stay safe and healthy,
Piotr and Danika
Last week’s meetup was nice to see and talk with other KiCad users. Let’s do it again this week.
This week, I’m happy to answer questions and I’ll be working through designing a KiCad version of the Medtronic OpenVentilator project (http://www.medtronic.com/openventilator 5). You may have heard that Medtronic (a multi-billion $ company) bought the company that cancelled the original gov’t contract 2 for low-cost ventilators in 2015 and then this week released a “kind of” open source version 3 of their current (not low-cost) ventilator.
In reality, they released scans of the schematics and some word documents for bring-up procedures. I’m going to see if we can turn the scans into a set of useful KiCad schematics + board files. This still doesn’t get to what’s needed to actually recreate more of these ventilators but it is a needed first step.
If you are curious about recreating designs from incomplete schematics, reverse engineering in KiCad or just want to hang out and chat, please stop by.
Then at 12:00 PM US PDT, Piotr Esden will livestream KiCad board layout:
Last year’s Hackaday Superconference badge was an electronic tour de force, packing an ECP5 FPGA shoehorned into a Game Boy-like form factor and shipping with a RISC-V core installed that together gave an almost infinite badge hacking potential. It did not however run Linux, and that’s something [Greg Davill] has addressed, as he’s not only running Linux on his badge, but also a framebuffer that allows him to use the badge screen as the Linux terminal screen. Finally you can watch Linux boot on your Superconference badge itself, rather than over its serial port.
He’s achieved this by changing essentially everything: from the new VexRiscv CPU core, to new video drivers and a VGA terminal courtesy of Frank Buss, now part of the LiteVideo project. It’s not quite a fully fledged Linux powerhouse yet, but you can find it in a GitHub repository should you have a mind to try it yourself. Paging back through his Twitter feed reveals the effort he’s put into this work over the last few months, and shows that it’s been no easy task.
For those keeping score at home, this is an open hardware design, running an open CPU core, with community-designed open-source peripherals, compiled by an open-source toolchain, running an open-source operating system. And it’s simply a fantastic demo for the badge, showing off how flexible the entire system is. One of the best parts of writing for Hackaday is that our community is capable of a huge breadth of amazing pieces of work, and this is an exemplar of that energy. We can’t wait to see what Greg and any other readers tempted to try it will come up with.
If you’d like to refresh your memory over the 2019 Supercon badge, here’s our write-up at the time.
I attended the 36th Chaos Communication Congress (36c3) during the last
week of 2019 in Leipzig, Germany. It was an amazing event and Hackaday has good coverage. All the talks are available online including my talk:
Want to run Linux on open hardware? This talk will explore Open Source Hardware projects capable of that task, and explore how RISC-V and free software FPGA projects can be leveraged to create libre systems.
The video is also available on YouTube:
My slides are on SlideShare:
The slides are also available as a PDF on GitHub.
I showed Linux running on a RISC-V core in the ECP5 FPGA on the Hackaday Supercon badge:
I gave a shout-out to Greg Davill who got Linux booting the OrangeCrab while at 36c3:
Greg’s open hardware OrangeCrab board features the ECP5 FPGA in an Adafruit Feather form factor and is capable of running a RISC-V “soft” core using LiteX.