Low-cost Amateur Radio SDR Receiver

April 28, 2020 fustiniSDR, tindie, wirelessLeave a comment

Alexander Rowsell writes on the Tindie blog about a DSP-based radio that can receive SSB:

As an amateur radio operator, I am always keeping an eye out for cool new radio-related things to tinker with. Hams have a long tradition of building and designing their own radios, and it’s great to see this still happening in the digital era. This DSP-based radio can receive SSB (single sideband) over almost the entire amateur HF band. This band spans from 1.9 MHz (also called 160 meters) all the way up to 28 MHz (10 meters) and everything in between.

This is a great radio for portable use. Paired with a small CW (continuous wave, the mode used for Morse code) transmitter, it would make a great QRP set for those who love low-power Morse communication. Bandwidth can be adjusted from 500Hz to 4kHz, which is perfect for CW as well as digital modes. The designer specifically designed it to be used with the extremely popular new digital mode FT-8, and it indeed fits the specifications very well. It could also be used for many other digital modes, including PSK, RTTY, JT65, and many more! The audio output can be wired directly into any PC — even a Raspberry Pi — to enable digital reception modes.

Software Defined Everything with Mike Ossmann and Kate Temkin

February 22, 2020 fustinihackaday, SDR, superconLeave a comment

Software defined radio has become a staple of the RF tinkerer, but it’s likely that very few of us have ever taken their software defined toolchain outside the bounds of radio. It’s an area explored by Mike Ossmann and Kate Temkin in their newly published Supercon talk as they use GNU Radio to do some things that you might find unexpected.

For most people, a software defined radio is a device. An RTL-SDR dongle perhaps, or the HackRF that a popular multi-tool for working in the radio frequency realm. But as they explain, the SDR hardware can be considered merely as the analogue front end, being just the minimal analogue circuitry coupled with a digitiser. The real software-defined part comes — as you might expect — in the software

Kate and Mike introduce GNU Radio Companion — the graphical UI for GNU Radio — as their tool of choice and praise it’s use as a general purpose digital signal processing system whether or not that includes radio. Taking their own Great Scott Gadgets GreatFET One USB hackers toolkit peripheral as an input device they demonstrate this by analysing the output from a light sensor. Instantly they can analyse the mains frequency in a frequency-domain plot, and the pulse frequency of the LEDs. But their bag of tricks goes much deeper, exploring multiple “atypical use cases” that unlock a whole new world through creative digital signal processing (DSP).

via Software Defined Everything with Mike Ossmann and Kate Temkin — Hackaday

iceRadio SDR project

February 27, 2018February 28, 2018 fustiniFPGA, microcontroller, SDR, verilog, wirelessLeave a comment

Software Defined Radio (SDR) project by Eric Brombaugh:

iceRadio

This is a test prototype for experimenting with Software Defined Radio (SDR). It is composed of several boards that are described in detail elsewhere on this site:

VHF Tuner – 20MHz – 1200MHz VHF/UHF downconverter.

RXADC Board – 40MSPS 14-bit ADC for capturing HF-band RF signals.

STM32F303 and ice5 Board – MCU and FPGA which implement the digital receiver.

I2S DAC PMOD – Used for stereo audio output of demodulated signals.

Combined with suitable firmware and FPGA design, these boards comprise a receiver capable of capturing 20kHz of signal from DC to over 1GHz, demodulating it with a variety of formats and driving high-quality audio.

Tuner

RF input from the antenna can optionally be tuned down from VHF/UHF frequncies to an IF frequency in the HF range before passing to the ADC.

ADC

Raw HF or downconverted VHF at an IF of 5MHz is digitized to 14-bit resolution. The maximum input signal allowed without exceeing the range of the ADC puts the 0dBfs point of this system at -10dBm in 50 ohms. The ADC runs at 40MSPS with a resolution of 10 bits, providing approximately 60dB of dynamic range and 20MHz of bandwidth which places the quantization noise floor at about -70dBm.

FPGA

From the ADC, data passes into the FPGA. This is an iCE5LP4k part which provides 20 4kb RAM blocks and 4 16×16 MAC blocks which are essential for the DSP required for the downconversion. In the FPGA the ADC data is pre-processed to a sample rate appropriate for the MCU. Figure 2 below shows the primary components of the FPGA design.

The C and Verilog source code is available on GitHub:

emeb/iceRadio

14-bit 80MSPS ADC for SDR experiments

March 24, 2017March 22, 2017 fustiniADC, SDR, wirelessLeave a comment

Eric Brombaugh designed this ADC board for RF signals:

RXADC_14 Pmod

This is an ADC designed for use in digitizing RF signals with up to 40MHz bandwidth and 80dB SNR. The form-factor is compatible with a dual-connector Digilent Pmod so that it can be used with commonly available FPGA development boards to build a variety Software-Defined radio functions.

Features:

ADC14C105 14-bit 105MSPS RXADC.
Onboard 3.3V Regulator (5V input)
Filtered Analog 3.3V Supply
Onboard 80MHz clock oscillator
Digilent-compatible 2-connector Pmod interface
50-ohm SMA input – 2.5Vpp ~= 0dBfs

emeb has shared the board on OSH Park:

14-bit 80MSPS ADC for SDR experiments

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DTV Tuner Breakout for SDR

February 28, 2017February 28, 2017 fustinibreakout, kicad, RF, SDR, STM32, wirelessLeave a comment

Eric Brombaugh designed this breakout board for the Rafael Microelectronics R820T2 Advanced Digital TV Silicon Tuner chip:

R820T2 Breakout

This is the same chip used in most all of the RTL-SDR dongles, as well as the Airspy and numerous other radios. The chip is a versatile front-end with reasonable sensitivity and wide tuning range.

The design presented here is almost an exact implementation of the Mfg’s suggested demo design from the datasheet, implemented on the OSHpark 4-layer PCB process and provides a simple 4-pin interface with power, ground and I2C bus for controlling the tuner. A broad-band RF input and 10MHz IF output are provided on SMA connectors.

The breakout PCB design and STM32F0 firmware for the Rafael R820T2 tuner chip are shared on GitHub:

emeb/r820t2

emeb has shared project on OSH Park:

r820t2_breakout v0.1

iceRadio SDR

January 24, 2017January 24, 2017 fustiniFPGA, hackaday, Lattice, RF, SDR, STM32, wirelessLeave a comment

From the Hackaday blog:

Ice, Ice, Radio Uses FPGA

Building a software defined radio (SDR) involves many trades offs. But one of the most fundamental is should you use an FPGA or a CPU to do the processing. Of course, if you are piping data to a PC, the answer is probably a CPU. But if you are doing the whole system, it is a vexing choice.

The FPGA can handle lots of data all at one time but is somewhat more difficult to develop and modify. CPUs using software are flexible–especially for coding user interfaces, networking connections, and the like) but don’t always have enough horsepower to cope with signal processing tasks (and, yes, it depends on the CPU).

[Eric Brombaugh] sidestepped that trade off. He used a board with both an ARM processor and an ICE FPGA at the heart of his SDR design. He uses three custom boards: one is the CPU/FPGA board, another is a 10-bit converter that can sample at 40 MSPS (sufficient to decode to 20 MHz), and an I2S DAC to produce audio. Each board has its own page linked from the main project.Z

The iceRadio project page has additional details:

RXADC Board – 40MSPS 10-bit ADC for capturing HF-band RF signals.
STM32F303 and ice5 Board – MCU and FPGA which implement the digital receiver.
I2S DAC PMOD – Used for stereo audio output of demodulated signals.

Design files and source code are available on GitHub: