Sergey Kiselev designed this I2S Audio pHAT:
This is a Raspberry Pi Zero pHAT form-factor I2S audio interface board based on a Cirrus Logic (Wolfson) WM8731 audio codec. It provides line input, line output, headphones output, and includes an on-board microphone.
From moosepr on Hackaday.io:
Possibly the worlds smallest Pi based gaming device!
Our 0.8mm thickness 2 layer service was used to make it as slim as possible:
The designs for a 3-D printed case are shared on the Hackaday.io project page:
moosepr designed this small and simple GameBoy-style device using the Raspberry Pi Zero:
I’m not overly fond of ‘rats nest’ wires, and I have a bit of an obsession with making things as small as possible, so this is what I came up with.
Tis just an ILI9341 screen, a Pi Zero, 2 navi switches (5 way), and a battery (with charge/protect circuit)
has shared the board on OSH Park:
Here the board is in action:
Nick Sayer created a LED desk clock driven by NTP on a Raspberry Pi Zero W:
When I was in college, I bought and built a Heathkit GC-1000 WWV clock. Since then, I’ve been somewhat interested in accurate time measurement. I recently designed a GPS driven clock, but sometimes your local WiFi reception is better than GPS (say, indoors). For those circumstances, a clock that gets time from NTP over WiFi would be preferable. The newly released Raspberry Pi Zero W makes this quite a bit simpler to achieve
Brian Solon designed this compact board to add an Adafruit 2.2″ TFT LCD display to the Raspberry Pi Zero:
The design files are available on GitHub:
Black Mesa Labs created this board that adds a Lattice FPGA to a Raspberry Pi:
BML has been very much enchanted with the Lattice FPGA boards for Raspberry Pi, IcoBoard , BlackIce and IceHat. The IceZero board is a BML creation that attempts to combine the best features of all 3 boards into a single design.
IceZero features common with other designs
- Fully Open-Source Hardware and Software Design.
- Lattice ICE40HX4K FPGA that supports Clifford Wolf’s Project IceStorm tool chain.
- Interfaces to Raspberry Pi 2×20 GPIO Header for both power and bus interfaces.
- PROM programmable directly from Rasp Pi, no JTAG programmer required.
- External SRAM, supporting soft CPU core designs ( code execution ).
- Extra large SPI PROM, supporting soft CPU core designs ( code storage ).
- Industry standard PMOD expansion headers
IceZero features that are BML specific
- Mesa Bus Protocol 32 MHz SPI link between CPU and FPGA.
- 2-Layer PCB design. Orderable via OSH-Park or Gerbers for Downloading.
- FTDI 1×6 USB Serial Cable header for use with PC instead of Pi ( or as a soft CPU debug Trace Port ).
- Single Pi UART plumbed to FPGA for muxing to multiple external serial devices.
BlackMesaLabs has shared the board on OSH Park:
BML IceZero Lattice ICE40 FPGA for RaspPi